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dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp http:/ / www.net- control.co.kr http:/ / www.by.co.kr - 1 - bydmx3p-30/sp bydmx3p-30/sp bydmx3p-30/sp bydmx3p-30/sp bydmx3p-31/tqfp bydmx3p-31/tqfp bydmx3p-31/tqfp bydmx3p-31/tqfp data sheet data sheet data sheet data sheet (rev 1.2) (rev 1.2) (rev 1.2) (rev 1.2)
dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp http:/ / www.net- control.co.kr http:/ / www.by.co.kr - 2 - 1. pin diagram 1. pin diagram 1. pin diagram 1. pin diagram 28-lead, 0.300" wide, plastic dual inline package (pdip) 32-lead, thin (1.0 mm) plastic quad flat package (tqfp)
dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp http:/ / www.net- control.co.kr http:/ / www.by.co.kr - 3 - 2. pin description 2. pin description 2. pin description 2. pin description (bydmx3p-30/sp) (bydmx3p-30/sp) (bydmx3p-30/sp) (bydmx3p-30/sp) * address and dtime, duty, dmx/sta pins are normal high(inte rnal pullup). pin no. pin no. pin no. pin no. pin name pin name pin name pin name type type type type description description description description 1 / rst input chip reset input. this pin is an active low reset to the device. 2 rx input dmx signal input. 3 4 a6 input address bit 6. 5 a7 input address bit 7. 6 a8 input address bit 8. 7 vcc power positive supply for logic and i/ o pins(5vdc). 8 gnd power ground reference for logic and i/ o pins(0v). 9 xtal1 input crystal input(16mhz only). 10 xtal2 input crystal input(16mhz only). 11 dtime input sta mode delay time(h- fast, l- slow). 12 duty input no use 13 dmx/ sta input h- dmx mode, l- stand alone mode 14 15 pwm1 output pulse width modulation output # 1. 16 pwm2 output pulse width modulation output # 2. 17 pwm3 output pulse width modulation output # 3. 18 19 20 21 22 gnd power ground reference for logic and i/ o pins(0v). 23 a0 input address bit 0. 24 a1 input address bit 1. 25 a2 input address bit 2. 26 a3 input address bit 3. 27 a4 input address bit 4. 28 a5 input address bit 5.
dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp http:/ / www.net- control.co.kr http:/ / www.by.co.kr - 4 - (bydmx3p-31/tqfp) (bydmx3p-31/tqfp) (bydmx3p-31/tqfp) (bydmx3p-31/tqfp) pin no. pin no. pin no. pin no. pin name pin name pin name pin name type type type type description description description description 1 a7 input address bit 7. 2 a8 input address bit 8. 3 gnd power ground reference for logic and i/ o pins(0v). 4 vcc power positive supply for logic and i/ o pins(5vdc). 5 gnd power ground reference for logic and i/ o pins(0v). 6 vcc power positive supply for logic and i/ o pins(5vdc). 7 xtal1 power crystal input(16mhz only). 8 xtal2 power crystal input(16mhz only). 9 dtime input sta mode delay time(h- fast, l- slow). 10 duty input no use 11 dmx/ sta input h- dmx mode, l- stand alone mode 12 13 pwm1 output pulse width modulation output # 1. 14 pwm2 output pulse width modulation output # 2. 15 pwm3 output pulse width modulation output # 3. 16 17 18 19 20 21 22 gnd power ground reference for logic and i/ o pins(0v). 23 a0 input address bit 0. 24 a1 input address bit 1. 25 a2 input address bit 2. 26 a3 input address bit 3. 27 a4 input address bit 4. 28 a5 input address bit 5. 29 / rst input chip reset input. this pin is an active low reset to the device. 30 rx input dmx signal input. 31 32 a6 input address bit 6.
dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp http:/ / www.net- control.co.kr http:/ / www.by.co.kr - 5 - 3. address select. 3. address select. 3. address select. 3. address select. l(logic level low) == selected. h(logic level high) == unselected. *address input is normal pullup. address address address address hex hex hex hex dec dec dec dec a8 a8a8 a8 a7 a7a7 a7 a6 a6a6 a6 a5 a5a5 a5 a4 a4a4 a4 a3 a3a3 a3 a2 a2a2 a2 a1 a1a1 a1 a0 a0a0 a0 000000000 000 000 h h h h h h h h h 000000001 001 001 h h h h h h h h l 000000010 002 002 h h h h h h h l h 000000011 003 003 h h h h h h h l l 000000100 004 004 h h h h h h l h h 000000101 005 005 h h h h h h l h l 000000110 006 006 h h h h h h l l h 000000111 007 007 h h h h h h l l l 000001000 008 008 h h h h h l h h h 000001001 009 009 h h h h h l h h l 000001010 00a 010 h h h h h l h l h 000001011 00b 011 h h h h h l h l l 000001100 00c 012 h h h h h l l h h 000001101 00d 013 h h h h h l l h l 000001110 00e 014 h h h h h l l l h 000001111 00f 015 h h h h h l l l l 000010000 010 016 h h h h l h h h h 000010001 011 017 h h h h l h h h l 000010010 012 018 h h h h l h h l h 000010011 013 019 h h h h l h h l l 000010100 014 020 h h h h l h l h h 000010101 015 021 h h h h l h l h l 000010110 016 022 h h h h l h l l h 000010111 017 023 h h h h l h l l l 000011000 018 024 h h h h l l h h h 000011001 019 025 h h h h l l h h l 000011010 01a 026 h h h h l l h l h 000011011 01b 027 h h h h l l h l l 000011100 01c 028 h h h h l l l h h 000011101 01d 029 h h h h l l l h l 000011110 01e 030 h h h h l l l l h 000011111 01f 031 h h h h l l l l l 000100000 020 032 h h h l h h h h h 000100001 021 033 h h h l h h h h l 000100010 022 034 h h h l h h h l h 000100011 023 035 h h h l h h h l l .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. 11111100 1fc 508 l l l l l l l h h 11111101 1fd 509 l l l l l l l h l 11111110 1fe 510 l l l l l l l l h 11111111 1ff 511 l l l l l l l l l
dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp http:/ / www.net- control.co.kr http:/ / www.by.co.kr - 6 - 4. wiring. 4. wiring. 4. wiring. 4. wiring. address select s/w circuit example * logic level "h"=1 logic level "l"=0 * if sta pin ="l" address=pattern no(1--11) stand alone mode s/w circuit example * sw on(logic lebel "l") = stand alone mode. sw off(logic lebel "h") = dmx mode.
dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp http:/ / www.net- control.co.kr http:/ / www.by.co.kr - 7 - duty s/w circuit example dtime s/w circuit example dtime input sw on (active "l") --> slow speed mode dtime input sw off(active "h") --> normal speed mode ***stand alone mode only***
dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp http:/ / www.net- control.co.kr http:/ / www.by.co.kr - 8 - 5. dmx512 signal in 5. dmx512 signal in 5. dmx512 signal in 5. dmx512 signal in dmx512 timing diagram receiver circuit block diagram dmx512 protect rs-422 or rs-485 bydmx3p-xx/xx line circuit line receiver rx pin (up to 255kbps) protect circuit example description description description description minimum minimum minimum minimum maximum maximum maximum maximum typical typical typical typical unit unit unit unit break 92 - 176 usec mark after break 12 <1,000,000 - usec bit time 3.92 4.02 4 usec dmx512 packet 1204 1,000,000 - usec
dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp http:/ / www.net- control.co.kr http:/ / www.by.co.kr - 9 - 6. pwm output 6. pwm output 6. pwm output 6. pwm output output address pwm1 : address pwm2 : address +1 pwm3 : address +2 if address set 100. pwm1 : 100 pwm2 : 101 pwm3 : 102 output current : max 10(ma) pwm frequence : pwm1, pwm2, pwm3 1000hz -- 976.6hz (duty pin high or open) duty ratio : 1/255 data : 8bit(0 to 255(dec) or 0 to ff(hex)). power on initial value : 1(1/255) pwm1 duty = 120/255 pwm2 duty = 120/255
dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp http:/ / www.net- control.co.kr http:/ / www.by.co.kr - 10 - 7. sample schematic(bydmx3p-30) 7. sample schematic(bydmx3p-30) 7. sample schematic(bydmx3p-30) 7. sample schematic(bydmx3p-30)
dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp http:/ / www.net- control.co.kr http:/ / www.by.co.kr - 11 - 8. stand alone mode pattern 8. stand alone mode pattern 8. stand alone mode pattern 8. stand alone mode pattern address=1 address=2 address=3
dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp http:/ / www.net- control.co.kr http:/ / www.by.co.kr - 12 - address=4 address=5 address=6
dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp dmx512 receiver chip bydmx3p- 30/ sp http:/ / www.net- control.co.kr http:/ / www.by.co.kr - 13 - address=7 address=8 address=9 random up/down pwm1(random) pwm2(random) pwm3(random) address=10 pwm1(random) up pwm1(random) down pwm2(random) up pwm2(random) down pwm3(random) up pwm3(random) down address=11 pwm1 pwm2 (random mixing pattern) pwm3

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